Cadence’s new AuraStack doesn’t try to “think like a simulator.” It does something more useful, and arguably more realistic: it takes natural-language intent and orchestrates Cadence’s existing test and simulation suites to speed printed circuit board (PCB) and advanced packaging design and testing.

Announced on Wednesday, the agentic system is aimed at the messy middle of engineering work, where thousands of steps in a development flow compete for an engineer’s attention. Cadence’s Michael Jackson, CVP of Cadence’s system design and analysis division, frames AuraStack as a productivity amplifier that can deliver a 15x boost by handling the task-navigation overhead so designers focus on design and engineering decisions.

Why the “AI vs precision” story matters here is because AI is usually positioned as the low-precision, shortcut-heavy alternative. High-performance computing (HPC), by contrast, has long leaned on ultra-precise double-precision mathematics. The Register’s core point is that these two ends of the spectrum often look incompatible, but the AuraStack approach suggests they can coexist. Low-precision AI can plan, route, and coordinate. High-precision simulations remain the final arbiter for engineering correctness. In other words, AuraStack is trying to get the speed and flexibility of AI without betting the farm on models that can produce plausible-sounding but wrong answers.

Cadence explicitly positions AuraStack as “not replacing these tools with hallucination-prone AI models.” The analogy it leans on is familiar from the broader wave of developer agents. It is like Anthropic’s Claude Code or OpenAI’s Codex, but instead of generating and running code inside a sandbox, AuraStack is designed to orchestrate an engineering workflow. The agent integrates with a wide range of open and proprietary models and functions as a natural language interface capable of planning and orchestrating complex multi-step circuit design and testing workflows.

A concrete example Jackson gives is IR reliability work. If an engineer needs to check and fix IR reliability, AuraStack helps identify power management components, create a simulation-ready power tree, run the simulation, and then provide feedback back to the designer. Each of those steps maps to a real workflow pattern in electronics design: gather requirements, build the model the simulator can understand, run the higher-precision analysis, interpret results, and iterate. AuraStack’s role is orchestration. The simulators stay the simulators.

This is also where the 15x claim becomes more than marketing. Jackson says Cadence’s existing product stack already automates many processes, but PCB and package design still requires completing thousands of tasks across development. He argues that 65% of an engineer’s day is spent navigating and dealing with those tasks. AuraStack’s promise is that an AI agent can handle the scutwork: planning which analysis and test suites to run, in what order, and how to loop feedback back to the designer. The productivity angle has operational consequences for teams, because the bottleneck in high-value engineering work is often not the simulation itself, but the coordination overhead around it.

And yes, the market signal is already there. Cadence says several large electronics players, including Nvidia, have signed up for the service. That matters for decision-makers because it suggests AuraStack is not an isolated science project, but a use case being taken seriously by companies that understand both HPC infrastructure and the realities of product development timelines.

It is also worth zooming out to the broader HPC-AI theme the story sits inside. Using low precision compute to run AI models that orchestrate more precise single- and double-precision physics simulations is not new. Nvidia is described as one of the biggest champions of this approach, which fits with the idea that GPUs are not limited to training and running AI models, even if that is what most people associate with them.

For additional context, the source points to work from the Department of Energy’s Sandia National Laboratories earlier this year, where researchers described AI agents as enabling a “self-driving lab” to develop and test new hypotheses. Those efforts did not use LLMs; they used more mature architectures like variational auto-encoders. Still, the parallel is strategic: if agents can plan experiments and analyses automatically, they can keep iterating after researchers have stopped interacting in real time. AuraStack is taking that logic into electronics workflows: orchestration for design, testing, and simulation, powered by the assumption that correctness still comes from high-precision compute.

So what’s at stake for executives and boards? If agentic AI can measurably reduce engineering cycle time by collapsing workflow overhead, it can shift competitive pressure across the electronics value chain. Vendors gain a story beyond “faster AI.” Engineers and customers get fewer context-switches and faster iteration. And the underlying business question becomes whether AI agents will increasingly serve as the control plane for complex engineering toolchains, with high-precision HPC remaining the compute engine behind the scenes.